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SIMD-accelerated computer vision on a $2 microcontroller

https://shraiwi.com/blog/simd-fast-esp32s3/
199zdw | | 58 | HN
jwr | parent | next
BTW, I find it pretty amazing that you can buy complete ESP32-S3-Zero boards on AliExpress for $5.33. That's for a little board with the chip, a ceramic antenna, a USB connector and an LED.

ESP32-C3-Zero are $2.80 each.

These prices are absolutely ridiculous for what you get. Also, the ease of use of these boards is incredible. Just connect them via USB to your computer and off you go.

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pjmlp | parent | next
> For its price, the ESP32-S3 is a powerhouse of a microcontroller.

Indeed, don't forget it is more powerful than computers like this one,

https://en.wikipedia.org/wiki/Amstrad_PC1512

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nl | parent | next
Also worth noting that most (all?) ESP32s have dual cores.

I recently implemented a beam-forming microphone with LLM transcription (offloaded to a browser model)[1] and was able to get all the beamforming and noise cancellation DSP code running on the second core along with the UI, while the and webserver that streams audio uses core 0.

I don't use SIMD myself, but it uses esp-dsp which is already using it.

[1] https://github.com/nlothian/earwing

peesem | parent | next
nit: 5.1MP/s to 11.2MP/s is not an increase of 220%, it's an increase of 120%. it's 2.2x faster, but percentage increase starts at 0%, not 100%. 100% faster is double, 200% faster is triple.
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camel-cdr | parent | next
The CH32V407/CH32V467 is a bit more expensive, was $2.4 per unit two month ago, but supports the embedded subset of the RISC-V vector extension.

So you basically get a full AVX-512/SVE level SIMD ISA, minus FP support and with 64-bit SIMD width. But you still have LMUL, which will be great here to maximize utilization.

lukan | parent | next
The engineering seems impressive, but how useful is the result? What can you detect exactly with it in real time?

Detecting corners, but to what resolution/detail, a picture with a result would have been helpful to understand the capability.

edit: missed this link, this is what this is about

https://en.wikipedia.org/wiki/Features_from_accelerated_segm...

paaloeye | parent | next
ESP32-S3 SIMDs are super difficult to use unfortunately
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adolph | parent | next
Interesting. Since this was implemented on the S3, which uses the ISA XTensa LX instead of the RISC-V of most newer ESP32 series chips, I looked into how Espressif is handling SIMD on the latter ISA. Apparently it is only present in limited fashion as a processor extension on the P4 and S31 [0]. The S31 datasheet claims SIMD [1] and the P4 datasheet [2] files them as "Processor Instruction Extensions."

0. https://bitbanksoftware.blogspot.com/2026/04/esp32-p4-simd-e...

1. https://documentation.espressif.com/esp32-s31_datasheet_en.p...

2. https://documentation.espressif.com/esp32-p4_technical_refer...

topspin | parent
It's all kinda sketchy with Espressif. They do not hesitate to ship hardware prior to publishing comprehensive documentation. The complete P4 TRM documentation for the PIE extension didn't arrive until June 2026, although it's been possible to buy P4 dev boards for roughly two years.

They also don't hesitate to signal "mass production" availability while they're still working out substantial errata. Espressif will ship the moral equivalent of "engineering sample" silicon (no, they don't call it that) for early use by their supported customers, and eventually iron out the bulk of the issues in later silicon.

Espressif applies the "release early, release often" model of open-source software, but for silicon, and I love them for it. But it does create pitfalls for early adopters that don't understand the game.

So the big hole in ESP32-S31 SIMD documentation (literally "Coming soon"[1]) isn't surprising, despite the fact that you can buy official and third party dev boards right now.

[1] https://esp32-s31.espressif.com/en/docs/9-Technical%20Refere...

varispeed | parent | next
Why is it still called SIMD-accelerated, if these are now just normal instructions. You just have to take a little bit more effort into restructuring your algorithms to make use of them.
anthomtb | parent
How does using instructions that operate on multiple data elements, which make your software 3 times faster, not fit the definition of SIMD-accelerated?
varispeed | root | parent
Because these are normal instructions.

If you do multiplication using mul instead of loop and add, is it acceleration too?

anthomtb | root | parent
Yes.

The article would then be "MUL-accelerated multiplication". Obviously any modern compiler should not require a developer to make that optimization.

What does "normal instructions" mean? I don't see (or missed) a heading with "Normal" in the ESP32 docs.

Edit: Or are you saying the instruction called out by the author is not SIMD?

| root | parent
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